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Note that processing steps must be bounded in time to ensure robust execution of the cooperative task scheduling between coprocessor and shell. In addition, every coprocessor must accommodate a (hardware) reset input through which a control task can reset the coprocessor to a predefined state in case of an error condition. These restrictions are part of the acceptance criteria for embedding a new coprocessor into an Eclipse instantiation. The simplified code in Figure 8 shows a top-level coprocessor control loop as an example of multitasking coprocessor design using the six Eclipse primitives.

Eclipse relies on Nexperia-DVP SoC integration in a similar fashion, using standardized communication protocols (Philips proprietary protocols: DTL for communication between devices and MTL for communication to off-chip memory). At the application level, OMAP algorithms explicitly specify exact (typical and worst-case) timing, DMA, and memory requirements [139]. How to specify overall timing behavior with the highly dynamic workload of Eclipse’s media-processing applications and the distributed scheduling of Eclipse coprocessors is topic of further research.

28 Chapter 2 Multiprocessor architecture design MOVE architectures can be deployed as the core of an application-specific SoC subsystem. The MOVE framework is well suited for Eclipse coprocessor design, similar to Krishnan’s [86] study of a VLIW-style DCT coprocessor using A|RT designer. An open question is in how far the MOVE architecture template can support the interaction with the Eclipse coprocessor shell. Prophid/CPA (Philips Research) The Prophid architecture template targets real-time video-display processing, defining a data-driven, or stream-based multiprocessor SoC subsystem [91].

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